The invention relates to a method for code error overlaying in digital transmission signals which are transformed before transmission via a digital link and a redundant alphabet code having a plurality of modes.
A monitoring of the transmitted digital signal in digital signal transmission links with respect to a specific monitoring criterion, for example synchronous information of digital signals or a coding rule, is undertaken via, for example, a running digital sum in terminals, and under given conditions, in intermediate regenerators as known from German AS No. 3004767, incorporated herein by reference. Due to a low error rate of transmission links for digital signals such as below 10.sup.-10 errors per bit, and due to the possibility that occurring errors do not lead to infractions of the coding rule, errors are mixed into the digital signals to be transmitted to a certain extent by a terminal, the monitoring criterion being intentionally falsified by these errors. As a consequence of the low error rate in digital transmission systems, it is possible to introduce easily identifiable code errors into the digital signals to be transmitted without a significant falsification of the informational content of these signals appearing. For situations in which a noticeably higher error rate is mixed in, the known method is thus unsuitable. Such possibilities are, for example, desirable in digital transmission links where possibilities of error multiplication are established due to the employment of scramblers and alphabet codes.
German Letters Patent No. 2944377, incorporated herein by reference, discloses a line terminal connected to a digital interface DS which, following the digital interface, comprises a series connection of a receive interface EI, a transmit-side code converter CUS, and a transmission amplifier, to which a line interface LS is connected. At the receive side following the line interface LS, the line terminal comprises a receiving amplifier EV, a receive-side code converter CUE, and a transmit interface SI to which a digital interface DS is in turn connected. The exchange-side interface signal is converted into a binary signal in the receive interface EI, is transformed into an alphabet code in the transmit-side code converter, for example in accordance with a 5B 6B conversion or a 4B 3T conversion, and is set to the correct pulse shape at the desired level in the transmit amplifier. The code tables employed for the conversion comprise a plurality of modes. In accordance with previous history, it is thus possible to allocate one of a plurality of secondary values to a primary value. Depending on the mode, the secondary values can be different, but identical secondary values in different modes are always allocated to one and the same primary value.
The table for such a code is shown in German AS No. 31 17 221, and which has been incorporated herein as FIG. 9.
The description of this table shown in FIG. 9 herewith and incorporated from the aforementioned German Patent is as follows.
FIG. 9 shows a table of the 32 possible, different code words of five binary digits that the input signal can assume. The running numbers 0 through 31 indicate the respective amplitude level. Following the five-bit words, the six-bit words of the output signal are shown in positive and in negative mode, these being output as a result of the conversion. The amplitude levels corresponding to the six-bit words and the two sequential modes are also shown. As already mentioned above, the six-bit words can appear in the positive or in the negative mode and are controlled by the running digital sum. The sequence of the five-bit words and of the six-bit words is indicated with A B C . . . , where A is respectively read in or output first. It turns out that the 32 possible amplitude values of the input signal can be divided into two ranges of equal size, whereby the one range covers the amplitude values from 0 through 15 and the other range covers the amplitude values 16 through 31.
The allocation between the six-bit words and the five-bit words in the first range has been selected such that the greatest possible coincidence between the input signal and output signal respectively derives when the first place of the six-bit word is not taken into consideration. Not only a simple but also a fast allocation in the occurring amplitude ranges is thus assured.
In view of such a simple construction while avoiding involved read-only memories, the allocation for the second range has thus been selected such that the code word for the positive mode for the lowest amplitude value of the second range corresponds to the inverted code word of the negative mode of the highest amplitude value of the first range. Binarily expressed, the code word corresponding to the amplitude value 49 represents the inverted code word for the amplitude value 14. Since the code words for the positive and negative mode are the same given the highest amplitude value of the first range, they are likewise the same for the lowest amplitude value of the second range as well.
For the second-lowest amplitude value of the second range, the code word 57 for the positive mode corresponds to the inverted code word 6 of the negative mode of the second-highest amplitude value of the first range. Furthermore, the code word 17 for the negative mode corresponds to the inverted code word 46 of the positive mode of the second-highest amplitude value of the first range. Given the assumption of a symmetry line between the amplitude values 15 and 16 of the five-bit word and the corresponding values of the six-bit word, the table of FIG. 9 is thus symmetrical, and diagonally inverted. Accordingly, the code word 19 for the fourth-highest amplitude value of the second range is the same as the inverted code word 44 for the negative mode of the fourth-highest amplitude value of the first range. Since the code words 44 for the positive and negative mode are also the same in this case in the first range, they are also the same for the fourth-lowest amplitude value of the second range. Finally, the code word for the positive mode of the highest amplitude value of the second range is the same as the inverted code word of the negative mode of the lowest amplitude value of the first range. Given the lowest amplitude value of the first range, the code words for the positive and for the negative mode are the same, so that they are likewise the same for the highest amplitude of the second range.
At the receive side, the conversion of the six-digit binary words back into five-digit binary words occurs upon application of the same allocation in a correspondingly reverse direction.
In the re-conversion at the receive side, the problem can occur that a falsification of the originally transmitted six-bit word occurs in the transmission due to a disturbance. Given the assumption that only a single bit was falsified, various consequences are possible. It can turn out that not one bit but a plurality of bits are falsified after the conversion, and it can also turn out that no bit is falsified. Thus, a code word that was not originally employed can also have arisen. The error multiplication factor for the allocation according to the table of FIG. 9 amounts to 1.28 bits on the average. The error multiplication is thus very slight by comparison.
The construction of the allocations in accordance with the table of FIG. 9 can be a combinatorial network optimized in accordance with known means with gates and controllable inverters in an LSI circuit, for example in what is referred to as a mask-programmable logic module of series SH100.
At the receive side, the line terminal of German Patent No. 2944377, incorporated herein by reference, contains a receive amplifier EV which can be a regenerator for digital signals transmitted via copper line links. It can also be a photo-amplifier in case a link conducted via light waveguides follows the line interface. The reconversion of alphabet code into a binary signal occurs in a receive-side code converter CUE. This binary signal is transformed in the transmit interface SI into the interface code and is output with the prescribed level to the digital interface DS. To this extent, FIG. 1 of the present patent application corresponds to FIG. 1 of the German Patent No. 2944377, incorporated herein by reference.